[Kernel] Honor leading strides in SM90 tensorwise CUTLASS scaled_mm - #55537

Summary

Fix SM90 tensorwise CUTLASS scaled GEMM addressing for aligned sliced or padded
tensor views by forwarding their actual leading strides instead of
reconstructing tightly packed strides from shape alone.

The operator entry point accepts row-major A/output and column-major B with
aligned padded leading dimensions. The common C3x caller discarded that
metadata, and the SM90 FP8 caller independently reconstructed packed strides.
Both cases could silently read or write incorrect addresses. This forwards the
runtime leading dimensions without adding tensor copies; packed inputs retain
the same stride values as before.

The SM90 FP8 caller needs separate handling when swap_ab is enabled: the
row-major output is presented to the epilogue as a column-major transpose, so
its leading dimension belongs to the second stride component.

The SM100/SM120 and blockwise FP8 callers construct their own packed strides
and have the same defect. They are not fixed here because I have no SM100/SM120
hardware to validate on; they are tracked as remaining work on #55534.

The added A leading-stride check does not reject an existing supported packed
layout: B already requires b.stride(1) % 16 == 0, which enforces aligned K
for packed inputs, and packed A has a.stride(0) == K. It only rejects padded
A views whose leading dimension violates CUTLASS's AlignmentAB = 16
requirement. When K itself is unaligned, the Python wrapper already selects
the Triton fallback.

Partially addresses #55534; remaining architecture-specific callers are
tracked on that issue.

Regression coverage

The former combined subset test is expanded across INT8 and FP8, normal and
swap_ab dispatches (M=512 and M=32), and independent padded-A, padded-B,
and padded-output cases. A negative case verifies that a misaligned A leading
dimension is rejected at the operator boundary.

Validation

Environment: NVIDIA H800 PCIe (SM90), CUDA 13.0, PyTorch 2.13.0+cu130.

# Five-way baseline/fix matrix on base a69e75b9
baseline: 8.10% to 8.16% mismatches for each independently padded tensor
patched:  0 mismatches in all five cases; max abs error ~= 3.5e-7

# Final focused regression on base f2e2936f
# (INT8/FP8, normal/swap, A/B/output + alignment)
PYTHONPATH=$PWD /root/autodl-tmp/vllm-fp8-venv/bin/python -m pytest \
  tests/kernels/quantization/test_cutlass_scaled_mm.py -q --disable-warnings \
  -k 'strided_subsets or rejects_misaligned_a_leading_stride'
13 passed, 720 deselected in 3.92s

# SM90 FP8 pre-fix/post-fix probe
before: all 6 combinations incorrect (M=32/512 x padded A/B/output)
after:  all 6 combinations bitwise equal, 0 mismatches

# Full CUTLASS scaled-mm test file on the final revision
PYTHONPATH=$PWD /root/autodl-tmp/vllm-fp8-venv/bin/python -m pytest \
  tests/kernels/quantization/test_cutlass_scaled_mm.py -q --disable-warnings
679 passed, 54 skipped in 1119.16s

# Targeted formatting/lint hooks
uvx pre-commit run clang-format --files \
  csrc/libtorch_stable/quantization/w8a8/cutlass/c3x/cutlass_gemm_caller.cuh
uvx pre-commit run ruff-check --files \
  tests/kernels/quantization/test_cutlass_scaled_mm.py
uvx pre-commit run ruff-format --files \
  tests/kernels/quantization/test_cutlass_scaled_mm.py
All passed

Model evaluations are not applicable: this is a low-level kernel addressing
fix, and the focused numerical comparison covers the affected output contract.

Duplicate-work check

I searched open PRs by issue number and by CUTLASS scaled_mm leading stride
and cutlass_gemm_caller stride. No open PR addresses this bug. The keyword
results #33651 and #41834 concern different kernel/backend changes.

AI assistance disclosure

AI assistance was used to help inspect the CUTLASS/PyTorch stride contract,
prepare the patch and tests, and organize the validation evidence. I reviewed
the changed lines and validation results before submission.